1.
Mohamad Ashari Z, Nordin AN. Theoretical Modeling and Simulation of Phase-Locked Loop (PLL) for Clock Data Recovery (CDR). IIUMEJ [Internet]. 2012 Jan. 4 [cited 2024 Mar. 28];12(5). Available from: https://journals.iium.edu.my/ejournal/index.php/iiumej/article/view/250